VLSI Implementation of Image Encryption and Decryption Using Reversible Logic Gates

Abstract

As a crucial strategy for low power design and quantum computing, reversible logic synthesis and testing is an
intriguing field of study. A wide variety of fields may benefit from reversible calculations, including quantum
computing, nanotechnology, bio-information, digital signal processing, and many more. To protect sensitive
information from prying eyes, a cryptography system is essential for all of these uses. One of the main issues with
well-cured cryptography algorithms is their high power and area requirements. To get around these issues, this paper
suggests a Reversible Logic Gates Cryptography Design (RLGCD). Architectures for encryption and decryption are
both designed using RLGCD. To encrypt and decrypt data, the key is generated using a Linear Feedback Shift
Register. The Least Significant Bit (LSB) technique is used for data watermarking in order to further enhance data
security. It assesses the RLGCD architecture's FPGA performance. The performance of RLGCD architecture is
much better than that of other traditional systems.