“FRONT DESIGN AND IMPLEMENTATION OF HIGH SPEED HYBRID DUAL D-FIFO-FF (FLIP-FLOP) SYNCHRONIZER USING VERILOG”. INTERNATIONAL JOURNAL OF ADVANCED RESEARCH AND REVIEW (IJARR), vol. 5, no. 9, Sept. 2020, pp. 93-108, https://www.ijarr.org/index.php/ijarr/article/view/760.